Publication(January 2002 - December 2002)
- H. Itoga, T. HARAIKAWA, Y. YAMASHITA, and I. NAKATA
"Register Allocation Methods of Improved Software
Pipelining for Loops with Conditional Branches,"
The Transactions of the Institute of Electronics, Information
and Communication Engineers D-I, Vol. J85-D-I No.
1, pp. 31-39, January 2002.
Abstract - The code
of improved software pipelining for loops with conditional
branches usually becomes large and complex. The register
interference graph for such a code also becomes large
and complex. To reduce the complexity of register allocation
problem for such a code, and to reduce the time for register
allocation, we proposed the method to combine interference
graphs of similar program segments and showed the effectiveness
of our methods.
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